Microsemi Corporation ZL30121GGGV2
- Part Number:
- ZL30121GGGV2
- Manufacturer:
- Microsemi Corporation
- Ventron No:
- 2972468-ZL30121GGGV2
- Description:
- IC SONET/SDH SYNCH 100CABGA
- Datasheet:
- ZL30121GGGV2
Description
The ZL30121 is a low jitter system synchronizer that supports the requirements of Telcordia GR253 and GR1244 for Stratum 3, 4E, 4 and SMC clocks, and the requirements of ITUT G781 SETS, G813 SEC, Ġ.823, G.824 and G.825 clocks. It provides two DPLLs which are independently configurable through a serial software interface. DPLL1 provides all the features necessary for generating SONET/SDH compliant clocks including automatic hitless reference switching, automatic mode selection (locked, freerun, holdover), selectable loop bandwidth and pullin range. DPLL2 provides a comprehensive set of features necessary for generating derived output clocks and other general purpose clocks.
Features
Supports the requirements of Telcordia GR253 and GR1244 for Stratum 3, 4E, 4 and SMC clocks, and the requirements of ITUT G781 SETS, G813 SEC, Ġ.823, G.824 and G.825 clocks
Internal APLL provides standard output clock frequencies up to 622.08 MHz with jitter <3 ps RMS suitable for GR253CORE OC12 and G.813 STM16 interfaces
Programmable output synthesizers generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz
Provides two DPLLs which are independently configurable through a serial software interface
DPLL1 provides all the features necessary for generating SONET/SDH compliant clocks including automatic hitless reference switching, automatic mode selection (locked, freerun, holdover), selectable loop bandwidth and pullin range
DPLL2 provides a comprehensive set of features necessary for generating derived output clocks and other general purpose clocks
Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to: 77.76 MHz in addition to 2 kHz
Supports master slave configuration for Advanced TCA Trays
Configurable input to output delay and output to output phase alignment
Optional external feedback path provides dynamic input to output delay compensation
Provides 3 sync inputs for output frame pulse alignment
Generates several styles of output frame pulses with selectable pulse width, polarity and frequency
Flexible input reference monitoring automatically disqualifies references based on frequency and phase irregularities
Supports IEEE 1149.1 JTAG Boundary Scan
Applications
SONET/SDH network synchronization
Telecom equipment synchronization
Test and measurement equipment synchronization
Industrial automation synchronization
Medical equipment synchronization
The ZL30121 is a low jitter system synchronizer that supports the requirements of Telcordia GR253 and GR1244 for Stratum 3, 4E, 4 and SMC clocks, and the requirements of ITUT G781 SETS, G813 SEC, Ġ.823, G.824 and G.825 clocks. It provides two DPLLs which are independently configurable through a serial software interface. DPLL1 provides all the features necessary for generating SONET/SDH compliant clocks including automatic hitless reference switching, automatic mode selection (locked, freerun, holdover), selectable loop bandwidth and pullin range. DPLL2 provides a comprehensive set of features necessary for generating derived output clocks and other general purpose clocks.
Features
Supports the requirements of Telcordia GR253 and GR1244 for Stratum 3, 4E, 4 and SMC clocks, and the requirements of ITUT G781 SETS, G813 SEC, Ġ.823, G.824 and G.825 clocks
Internal APLL provides standard output clock frequencies up to 622.08 MHz with jitter <3 ps RMS suitable for GR253CORE OC12 and G.813 STM16 interfaces
Programmable output synthesizers generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz
Provides two DPLLs which are independently configurable through a serial software interface
DPLL1 provides all the features necessary for generating SONET/SDH compliant clocks including automatic hitless reference switching, automatic mode selection (locked, freerun, holdover), selectable loop bandwidth and pullin range
DPLL2 provides a comprehensive set of features necessary for generating derived output clocks and other general purpose clocks
Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to: 77.76 MHz in addition to 2 kHz
Supports master slave configuration for Advanced TCA Trays
Configurable input to output delay and output to output phase alignment
Optional external feedback path provides dynamic input to output delay compensation
Provides 3 sync inputs for output frame pulse alignment
Generates several styles of output frame pulses with selectable pulse width, polarity and frequency
Flexible input reference monitoring automatically disqualifies references based on frequency and phase irregularities
Supports IEEE 1149.1 JTAG Boundary Scan
Applications
SONET/SDH network synchronization
Telecom equipment synchronization
Test and measurement equipment synchronization
Industrial automation synchronization
Medical equipment synchronization
Microsemi Corporation ZL30121GGGV2 technical specifications, attributes, parameters and parts with similar specifications to Microsemi Corporation ZL30121GGGV2.
- Mounting TypeSurface Mount
- Package / Case100-FBGA
- Surface MountYES
- Number of Pins100
- Operating Temperature-40°C~85°C
- PackagingTray
- Published2009
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Number of Terminations100
- Voltage - Supply2.97V~3.63V
- Terminal PositionBOTTOM
- Terminal FormBALL
- Number of Functions1
- Supply Voltage1.8V
- Terminal Pitch0.8mm
- Base Part NumberZL30121
- OutputLVCMOS, LVPECL
- Pin Count100
- Qualification StatusNot Qualified
- Number of Elements2
- Number of Circuits1
- Frequency (Max)622.08MHz
- InputLVCMOS
- Ratio - Input:Output11:12
- PLLYes
- Differential - Input:OutputNo/Yes
- Telecom IC TypeATM/SONET/SDH SUPPORT CIRCUIT
- Main PurposeSONET/SDH, Stratum
- Length9mm
- Width9mm
- RoHS StatusNon-RoHS Compliant
The three parts on the right have similar specifications to ZL30121GGGV2.
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ImagePart NumberManufacturerMounting TypePackage / CaseSurface MountNumber of PinsOperating TemperaturePackagingPublishedPart StatusMoisture Sensitivity Level (MSL)Number of TerminationsVoltage - SupplyTerminal PositionTerminal FormNumber of FunctionsSupply VoltageTerminal PitchBase Part NumberOutputPin CountQualification StatusNumber of ElementsNumber of CircuitsFrequency (Max)InputRatio - Input:OutputPLLDifferential - Input:OutputTelecom IC TypeMain PurposeLengthWidthRoHS StatusFactory Lead TimeSupplier Device PackageMountMax Operating TemperatureMin Operating TemperatureRadiation HardeningView Compare
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ZL30121GGGV2Surface Mount100-FBGAYES100-40°C~85°CTray2009Obsolete1 (Unlimited)1002.97V~3.63VBOTTOMBALL11.8V0.8mmZL30121LVCMOS, LVPECL100Not Qualified21622.08MHzLVCMOS11:12YesNo/YesATM/SONET/SDH SUPPORT CIRCUITSONET/SDH, Stratum9mm9mmNon-RoHS Compliant-------
-
Surface Mount100-FBGA---40°C~85°CTray2009Active3 (168 Hours)-2.97V~3.63V-----ZL30121LVCMOS, LVPECL---1622.08MHzLVCMOS11:12YesNo/Yes-SONET/SDH, Stratum--ROHS3 Compliant6 Weeks100-CABGA (9x9)----
-
Surface Mount64-TQFP-64-40°C~85°CTray2010Active3 (168 Hours)-2.97V~3.63V-----ZL30105Clock---165.536MHzClock, Crystal3:12YesNo/No-T1/E1--ROHS3 Compliant7 Weeks64-TQFP (10x10)Surface Mount85°C-40°CNo
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Surface MountQFN---40°C~85°CTray2014Active3 (168 Hours)--------CML, CMOS---11.035GHzCML, CMOS, Crystal4:3YesYes/Yes-Telecom--ROHS3 Compliant8 Weeks32-QFN (5x5)-85°C-40°C-
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