Texas Instruments VSP01M02ZWDR
- Part Number:
- VSP01M02ZWDR
- Manufacturer:
- Texas Instruments
- Ventron No:
- 3006787-VSP01M02ZWDR
- Description:
- IC AFE 12BIT 36MHZ 100BGA
- Datasheet:
- VSP01M01, VSP01M02
Description
The VSP01M01 and VSP01M02 are mixed-signal ICs for charge-coupled device (CCD) signal processing. They feature a built-in CCD timing generator, analog-to-digital converter (ADC), and CCD vertical driver. The AFE CCD channel uses correlated double sampling to extract image information from the CCD output signal. Signal paths have gains ranging from -9 dB to 44 dB. The black level clamping circuit enables accurate black reference level and quick black level recovery after gain changes. An input signal clamp with CDS offset adjustment function is available. The system synchronizes the master clock, horizontal driver (HD), and vertical driver (VD). The VSP01M01 and VSP01M02 support all signal terminals required by CCD architecture. The RG driver, HG driver, and vertical drivers synchronize the ADC clock phase to realize ideal performance.
Features
CCD Signal Processing:
36-MHz Correlated Double Sampling (CDS)
16-Bit Analog-to-Digital Conversion:
36-MHz Conversion Rate
No Missing Codes Ensured
80-dB Input-Referred SNR (at 12-dB Gain)
Programmable Black Level Clamping
Programmable Gain Amplifier (PGA):
-9 dB to 44 dB
3 dB to 18 dB by Analog Front Gain
6 dB to 26 dB by Digital Gain
Timing Generator:
Fully Programmable VRATE Timing by Serial I/O
Default Timing Supports Standard Operation
Flexible VRATE Pin Assignment
HD/VD Master or Slave Mode
External Trigger, Strobe Function Support
Flexible Draft or Pixel Summing Operation
RG and HG Driver:
Programmable Drivability Control
Two Horizontal Transfer Independent Drivers
One Reset Gate Driver
CCD Horizontal High-Speed Clock Phase Control:
Fine Step: 0.28 ns
Wide Step: 1/3 Pixel Rate
Vertical CCD Driver:
8-Channel VDRIVER with Sub-Driver
Supports Three-Field CCD Driving
Three Level Drivers (VTRANSFER) × 5
Two Level Drivers (VTRANSFER) × 3
Two Level Drivers (ESHUTTER) × 1
450 pF to 1890 pF with 60 Ω to 240 Ω
Flexible Voltage Operation:
AFET TG: 2.7 V to 3.6 V
VL: -5.0 V to -9.0 V
VM: GND
VH: 11.5 V to 15.5 V
Low Power: 139 mW at 3.0 V, 36 MHz
Stand-By Power-Save Mode: 36 mW
Stand-By Mode (MCK Off): 10 mW
BGA-100 Package
Applications
Digital Cameras
The VSP01M01 and VSP01M02 are mixed-signal ICs for charge-coupled device (CCD) signal processing. They feature a built-in CCD timing generator, analog-to-digital converter (ADC), and CCD vertical driver. The AFE CCD channel uses correlated double sampling to extract image information from the CCD output signal. Signal paths have gains ranging from -9 dB to 44 dB. The black level clamping circuit enables accurate black reference level and quick black level recovery after gain changes. An input signal clamp with CDS offset adjustment function is available. The system synchronizes the master clock, horizontal driver (HD), and vertical driver (VD). The VSP01M01 and VSP01M02 support all signal terminals required by CCD architecture. The RG driver, HG driver, and vertical drivers synchronize the ADC clock phase to realize ideal performance.
Features
CCD Signal Processing:
36-MHz Correlated Double Sampling (CDS)
16-Bit Analog-to-Digital Conversion:
36-MHz Conversion Rate
No Missing Codes Ensured
80-dB Input-Referred SNR (at 12-dB Gain)
Programmable Black Level Clamping
Programmable Gain Amplifier (PGA):
-9 dB to 44 dB
3 dB to 18 dB by Analog Front Gain
6 dB to 26 dB by Digital Gain
Timing Generator:
Fully Programmable VRATE Timing by Serial I/O
Default Timing Supports Standard Operation
Flexible VRATE Pin Assignment
HD/VD Master or Slave Mode
External Trigger, Strobe Function Support
Flexible Draft or Pixel Summing Operation
RG and HG Driver:
Programmable Drivability Control
Two Horizontal Transfer Independent Drivers
One Reset Gate Driver
CCD Horizontal High-Speed Clock Phase Control:
Fine Step: 0.28 ns
Wide Step: 1/3 Pixel Rate
Vertical CCD Driver:
8-Channel VDRIVER with Sub-Driver
Supports Three-Field CCD Driving
Three Level Drivers (VTRANSFER) × 5
Two Level Drivers (VTRANSFER) × 3
Two Level Drivers (ESHUTTER) × 1
450 pF to 1890 pF with 60 Ω to 240 Ω
Flexible Voltage Operation:
AFET TG: 2.7 V to 3.6 V
VL: -5.0 V to -9.0 V
VM: GND
VH: 11.5 V to 15.5 V
Low Power: 139 mW at 3.0 V, 36 MHz
Stand-By Power-Save Mode: 36 mW
Stand-By Mode (MCK Off): 10 mW
BGA-100 Package
Applications
Digital Cameras
Texas Instruments VSP01M02ZWDR technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments VSP01M02ZWDR.
- MountSurface Mount
- Package / Case100-TFBGA
- Number of Pins100
- PackagingTape & Reel (TR)
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)2 (1 Year)
- Number of Terminations100
- Max Operating Temperature85°C
- Min Operating Temperature-25°C
- Max Power Dissipation139mW
- Terminal PositionBOTTOM
- Terminal FormBALL
- Number of Functions1
- Terminal Pitch0.65mm
- Base Part NumberVSP01M02
- Pin Count100
- Temperature GradeOTHER
- Number of Channels2
- InterfaceSPI, Serial
- Max Supply Voltage5.5V
- Min Supply Voltage3V
- Number of Bits10
- Resolution1.25 B
- Sampling Rate36 Msps
- Voltage - Supply, Analog2.7V~3.6V 5V
- Voltage - Supply, Digital2.7V~3.6V
- Consumer IC TypeCONSUMER CIRCUIT
- Length7mm
- Width7mm
- Radiation HardeningNo
- RoHS StatusROHS3 Compliant
- Lead FreeLead Free
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