Microchip Technology SY89827LHI

Description
The SY89827L is a High-Performance Bus Clock Driver with dual 1:10 or single 1:20 HSTL (High Speed Transceiver Logic) output pairs. It is designed for low voltage (3.3V/1.8V) applications requiring a large number of outputs to drive precisely aligned, ultra-low skew signals. The input is multiplexed from either HSTL or LVPECL (Low Voltage Positive Emitter Coupled Logic) by the CLK_SEL pin.
The Output Enables (OE1 & OE2) are synchronous, ensuring that the outputs are only enabled/disabled when they are already in the LOW state. This prevents the generation of runt clock pulses when the device is enabled/disabled.
The SY89827L features extremely low skew performance of <50ps over temperature and voltage, previously unachievable in a standard product with such a high number of outputs. It is available in a single space-saving package, enabling a lower overall cost solution.

Features
Dual LVPECL or HSTL input, 10 differential 1.5V HSTL compatible outputs
Configurable as dual-channel 10 output or a single-channel 20 output clock driver
Guaranteed AC parameters over temperature and voltage:
> 500MHz MAX
<50ps within device skew
<1.5ns propagation delay
<700ps t/t, time
Low jitter design
<1pSRMS cycle-to-cycle jitter
<10pspp total jitter
3.3V core supply, 1.8V output supply
Output enable function
Available in a 64-Pin EPAD-TQFP

Applications
High-performance PCs
Workstations
Parallel processor-based systems
Other high-performance computing
Communications