Texas Instruments SN74AS161DRE4
- Part Number:
- SN74AS161DRE4
- Manufacturer:
- Texas Instruments
- Ventron No:
- 3207257-SN74AS161DRE4
- Description:
- IC COUNTER BIN SYNC 4BIT 16-SOIC
- Datasheet:
- SN74AS161DRE4
Texas Instruments SN74AS161DRE4 technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments SN74AS161DRE4.
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case16-SOIC (0.154, 3.90mm Width)
- Number of Pins16
- Operating Temperature0°C~70°C
- PackagingTape & Reel (TR)
- Series74AS
- Pbfree Codeyes
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Number of Terminations16
- Additional FeatureTCO OUTPUT
- Packing MethodTAPE AND REEL
- TechnologyTTL
- Voltage - Supply4.5V~5.5V
- Terminal PositionDUAL
- Terminal FormGULL WING
- Peak Reflow Temperature (Cel)NOT SPECIFIED
- Number of Functions1
- Supply Voltage5V
- Reflow Temperature-Max (s)NOT SPECIFIED
- Base Part Number74AS161
- Pin Count16
- Qualification StatusNot Qualified
- Operating Supply Voltage5.5V
- Number of Elements1
- Power Supplies5V
- Load Capacitance50pF
- ResetAsynchronous
- FamilyAS
- Logic FunctionCounter
- DirectionUp
- Logic TypeBinary Counter
- Max I(ol)0.02 A
- Number of Bits per Element4
- Trigger TypePositive Edge
- Power Supply Current-Max (ICC)53mA
- fmax-Min75 MHz
- Clock Edge Trigger TypePositive Edge
- Count Rate40MHz
- TimingSynchronous
- Length9.9mm
- Width3.9mm
- RoHS StatusROHS3 Compliant
SN74AS161DRE4 Overview
This part, manufactured by Texas Instruments, falls under the category of Logic - Counters, Dividers. Its specific brand is 74AS161 and its mounting type is surface mount. The part is now considered obsolete and is packaged using a tape and reel method. It requires a voltage supply of 4.5V~5.5V and has a dual terminal position with a gull wing terminal form. Its qualification status is not qualified and it has a maximum I(ol) of 0.02 A. The count rate for this chip is 40MHz.
SN74AS161DRE4 Features
Embedded in the 16-SOIC (0.154, 3.90mm Width) package
4 bits per element
TCO OUTPUT
Operating supply voltage of 5.5V
SN74AS161DRE4 Applications
There are a lot of Texas Instruments SN74AS161DRE4 Counters & Dividers applications.
Signal gating
Timers
LINEARIZATION
Fixed and programmable divide-by-10,9,8,7,6,5,4,3,2 counters
MULTIPLICATION
Programmable binary and decade
SQUARE ROOT
Time Out Timer for Consumer-Application Industrial Controls
Time-delay circuits
Counter control/timers
This part, manufactured by Texas Instruments, falls under the category of Logic - Counters, Dividers. Its specific brand is 74AS161 and its mounting type is surface mount. The part is now considered obsolete and is packaged using a tape and reel method. It requires a voltage supply of 4.5V~5.5V and has a dual terminal position with a gull wing terminal form. Its qualification status is not qualified and it has a maximum I(ol) of 0.02 A. The count rate for this chip is 40MHz.
SN74AS161DRE4 Features
Embedded in the 16-SOIC (0.154, 3.90mm Width) package
4 bits per element
TCO OUTPUT
Operating supply voltage of 5.5V
SN74AS161DRE4 Applications
There are a lot of Texas Instruments SN74AS161DRE4 Counters & Dividers applications.
Signal gating
Timers
LINEARIZATION
Fixed and programmable divide-by-10,9,8,7,6,5,4,3,2 counters
MULTIPLICATION
Programmable binary and decade
SQUARE ROOT
Time Out Timer for Consumer-Application Industrial Controls
Time-delay circuits
Counter control/timers
SN74AS161DRE4 More Descriptions
IC COUNTER BIN SYNC 4BIT 16-SOIC
Logic - Counters Synchronous 4-Bit Binary Counters
These synchronous, presettable, 4-bit decade and binary counters feature an internal carry look-ahead circuitry for application in high-speed counting designs. The SN54ALS162B is a 4-bit decade counter. The �ALS161B, �ALS163B, �AS161, and �AS163 devices are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform. These counters are fully programmable; they can be preset to any number between 0 and 9 or 15. Because presetting is synchronous, setting up a low level at the load (LOAD) input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. The clear function for the �ALS161B and �AS161 devices is asynchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low, regardless of the levels of the CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, �ALS163B, and �AS163 devices is synchronous, and a low level at CLR sets all four of the flip-flop outputs low after the next clock pulse, regardless of the levels of the enable inputs. This synchronous clear allows the count length to be modified easily by decoding the Q outputs for the maximum count desired. The active-low output of the gate used for decoding is connected to CLR to synchronously clear the counter to 0000 (LLLL). The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. ENP and ENT inputs and a ripple-carry (RCO) output are instrumental in accomplishing this function. Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. RCO, thus enabled, produces a high-level pulse while the count is maximum (9 or 15, with QA high). The high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the level of CLK. These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times. The SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, and SN54AS163 are characterized for operation over the full military temperature range of �55C to 125C. The SN74ALS161B, SN74ALS163B, SN74AS161, and SN74AS163 are characterized for operation from 0C to 70C.
Logic - Counters Synchronous 4-Bit Binary Counters
These synchronous, presettable, 4-bit decade and binary counters feature an internal carry look-ahead circuitry for application in high-speed counting designs. The SN54ALS162B is a 4-bit decade counter. The �ALS161B, �ALS163B, �AS161, and �AS163 devices are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform. These counters are fully programmable; they can be preset to any number between 0 and 9 or 15. Because presetting is synchronous, setting up a low level at the load (LOAD) input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. The clear function for the �ALS161B and �AS161 devices is asynchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low, regardless of the levels of the CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, �ALS163B, and �AS163 devices is synchronous, and a low level at CLR sets all four of the flip-flop outputs low after the next clock pulse, regardless of the levels of the enable inputs. This synchronous clear allows the count length to be modified easily by decoding the Q outputs for the maximum count desired. The active-low output of the gate used for decoding is connected to CLR to synchronously clear the counter to 0000 (LLLL). The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. ENP and ENT inputs and a ripple-carry (RCO) output are instrumental in accomplishing this function. Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. RCO, thus enabled, produces a high-level pulse while the count is maximum (9 or 15, with QA high). The high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the level of CLK. These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times. The SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, and SN54AS163 are characterized for operation over the full military temperature range of �55C to 125C. The SN74ALS161B, SN74ALS163B, SN74AS161, and SN74AS163 are characterized for operation from 0C to 70C.
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