Silicon Labs SL23EP04SI-1HT

Description
The SL23EP04 is a low skew, low jitter, and low power Zero Delay Buffer (ZDB) designed to produce up to four (4) clock outputs from one (1) reference input clock for high-speed clock distribution applications. It features an on-chip PLL and a feedback pin (FBK) that allows feedback from any of the four output clocks. The SL23EP04 offers X/2, 1X, and 2X frequency options at the output with respect to the input reference clock. The SL23EP04-1H and -2H High Drive versions operate up to 220 MHz and 200 MHz at 3.3 V and 2.5 V power supplies, respectively. The standard versions -1 and -2 operate up to 167 MHz and 135 MHz at 3.3 V and 2.5 V power supplies, respectively, with CL-15 pF output load. The SL23EP04 enters Power Down (PD) mode if the input at CLKIN is DC (GND to VDD). In this state, all four output clocks are tri-stated, and the PLL is turned off, leading to 8 μA-typ power supply current draw.

Features
10 to 220 MHz operating frequency range
Low output clock skew: 60 ps-typ
Low output clock Jitter:
Low part-to-part output skew: 150 ps-typ
3.3 V to 2.5 V power supply range
Low power dissipation:
12 mA-typ at 66 MHz and VDD-3.3 V
10 mA-typ at 66 MHz and VDD-2.5 V
One input drives 4 outputs
Multiple configurations and drive options
Spread Thru™ PLL that allows use of SSCG
Available in 8-pin SOIC package
Available in Commercial and Industrial grades

Applications
Printers, MFPs, and Digital Copiers
PCs and Work Stations
Routers, Switchers, and Servers
Datacom and Telecom
High-Speed Digital Embedded Systems