ON Semiconductor NB7V585MMNG

Description
The NB7V585M is a differential 1to6 CML clock/data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INX/INX inputs incorporate internal 50 Ω termination resistors and will accept LVPECL, CML, or LVDS logic levels. The NB7V585M produces six identical output copies of clock or data operating up to 6 GHz or 10 Gb/s, respectively. As such, NB7V585M is ideal for SONET, GigE, Fiber Channel, Backplane, and other clock/data distribution applications. The 16 mA differential CML output structure provides matching internal 50 Ω source terminations, 400 mV output swings when externally terminated with a 50 Ω resistor to Vcc, and is optimized for low skew and minimal jitter. The NB7V585M is powered with either 1.8 V or 2.5 V supply and is offered in a lowprofile 5x5 mm 32pin QFN package.

Features
Maximum Input Data Rate > 10 Gb/s, Data Dependent Jitter < 10 ps
Maximum Input Clock Frequency > 6 GHz, Random Clock Jitter < 0.8 ps RMS, Max
Low Skew 1:6 CML Outputs, 20 ps Max
2:1 MultiLevel Mux Inputs
175 ps Typical Propagation Delay
50 ps Typical Rise and Fall Times
Differential CML Outputs, 330 mV PeaktoPeak, Typical
Operating Range: Vcc = 1.71 V to 1.89 V
Internal 50 Ω Input Termination Resistors
VREFAC Reference Output

Applications
SONET
GigE
Fiber Channel
Backplane
Other clock/data distribution applications