ON Semiconductor NB3F8L3010CMNG

Description
The NB3F8L3010C is a 3:1:10 Clock/Data fanout buffer operating on a 3.3 V/2.5 V Core Vpp and two flexible 3.3 V/2.5 V/ 18 V /1.5 V VDDO supplies. It features a Mux that selects between a Crystal input, or either of two differential/SE Clock Data inputs. Differential Inputs accept LVPECL, LVDS, HCSL, or SSTL and SingleEnded levels. The MUX control lines, SELO and SEL1, select CLKO/CLKO, CLK1/CLKI, or Crystal input pins. The Crystal input is disabled when a Clock input is selected. Output enable pin, OE, synchronously forces a High Impedance state (HZ) when Low. Outputs consist of 10 singleended LVCMOS outputs.

Features
Ten CMOS / LVTTL Outputs up to 200 MHz
Differential Inputs Accept LVPECL, LVDS, HCSL, or SSTL
Crystal Oscillator Interface
Crystal Input Frequency Range: 10 MHz to 50 MHz
Output Skew: 10 ps Typical
Additive RMS Phase Jitter @ 125 MHz, (12 kHz 20 MHz): 0.03 ps (Typical)
Synchronous Output Enable
Output Defined Level When Input is Floating
Power Supply Modes:
Single 3.3 V
Single 2.5 V
Mixed 3.3 V ±5% Core/2.5 V ±5% Output Operating Supply
Mixed 3.3 V ±5% Core/1.8 V±0.2 V Output Operating Supply
Mixed 3.3 V ±5% Core/1.5 V ±0.15 V Output Operating Supply
Mixed 2.5 V ±5% Core/ 1.8 V±0.2 V Output Operating Supply
Mixed 2.5 V ±5% Core/1.5 V ±0.15 V Output Operating Supply
Two Separate Output Bank Power Supplies
Industrial temp. range 40°C to 85°C
PbFree Devices

Applications
Clock Distribution
Networking and Communications
High End Computing
Wireless and Wired Infrastructure
End Products:
Servers
Ethernet Switch/Routers
ATE
Test and Measurement