Micron Technology Inc. MT49H32M18CFM-25E:B TR

Description
The MicronSIO RLDRAMⓇ 2MT49H32M18C and MT49H64M9C are high-performance, low-power DDR2 synchronous DRAMs designed for use in high-bandwidth applications. The devices are organized as 32 Meg x 18 and 64 Meg x 9, respectively, and feature a reduced cycle time of 15ns at 533 MHz. The devices are also nonmultiplexed, which allows for higher data rates and reduced latency.

Features
533 MHz DDR operation (1.067 Gb/s/pin data rate)
38.4 Gb/s peak bandwidth (x18 at 533 MHz clock frequency)
Organization:
32 Meg x 18
64 Meg x 9
8 banks
Reduced cycle time (15ns at 533 MHz)
Nonmultiplexed addresses (address multiplexing option available)
SRAM-type interface
Programmable READ latency (RL), row cycle time, and burst sequence length
Balanced READ and WRITE latencies in order to optimize data bus utilization
Data mask for WRITE commands
Differential input clocks (CK, CK#)
Differential input data clocks (DKx, DKx#)
On-die DLL generates CK edge-aligned data and output data clock signals
Data valid signal (QVLD)
32ms refresh (16K refresh for each bank; 128K refresh command must be issued in total each 32ms)
HSTL I/O (1.5V or 1.8V nominal)
25-600 matched impedance outputs
2.5VVEXT: 1.8VVDD 1.5V or 1.8VVDDQ I/O
On-die termination (ODT) RTT

Applications
The MicronSIO RLDRAMⓇ 2MT49H32M18C and MT49H64M9C are ideal for use in a wide range of high-bandwidth applications, including:
Networking
Servers
Workstations
Graphics cards
Gaming consoles