ON Semiconductor MC100LVEL30DWG
- Part Number:
- MC100LVEL30DWG
- Manufacturer:
- ON Semiconductor
- Ventron No:
- 3211689-MC100LVEL30DWG
- Description:
- IC D-TYPE POS TRG TRPL 20SOIC
- Datasheet:
- MC100LVEL30DWG
ON Semiconductor MC100LVEL30DWG technical specifications, attributes, parameters and parts with similar specifications to ON Semiconductor MC100LVEL30DWG.
- Factory Lead Time8 Weeks
- Lifecycle StatusLIFETIME (Last Updated: 4 days ago)
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case20-SOIC (0.295, 7.50mm Width)
- Number of Pins20
- Operating Temperature-40°C~85°C TA
- PackagingTube
- Published2006
- Series100LVEL
- JESD-609 Codee3
- Pbfree Codeyes
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Number of Terminations20
- Terminal FinishTin (Sn)
- SubcategoryFF/Latches
- TechnologyECL
- Voltage - Supply-3V~-3.8V
- Terminal PositionDUAL
- Terminal FormGULL WING
- Peak Reflow Temperature (Cel)260
- Supply Voltage3.3V
- Reflow Temperature-Max (s)40
- Base Part Number100LVEL30
- FunctionSet(Preset) and Reset
- Output TypeDifferential
- PolarityNon-Inverting
- Supply Voltage-Min (Vsup)3V
- Number of Circuits3
- Clock Frequency1.2GHz
- Propagation Delay820 ps
- Turn On Delay Time570 ps
- Logic FunctionAND, D-Type, Flip-Flop
- Current - Quiescent (Iq)62mA
- Output CharacteristicsOPEN-EMITTER
- Halogen FreeHalogen Free
- Number of Bits per Element1
- Trigger TypePositive Edge
- Clock Edge Trigger TypePositive Edge
- Height2.4mm
- Length12.95mm
- Width7.6mm
- Radiation HardeningNo
- RoHS StatusROHS3 Compliant
- Lead FreeLead Free
MC100LVEL30DWG Overview
It is packaged in the way of 20-SOIC (0.295, 7.50mm Width). The Tubepackage contains it. In the configuration, Differentialis used as the output. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis in the way of this electric part. A voltage of -3V~-3.8Vis required for its operation. -40°C~85°C TAis the operating temperature. D-Typedescribes this flip flop. JK flip flop is a part of the 100LVELseries of FPGAs. There should be no greater frequency than 1.2GHzon its output. There is a consumption of 62mAof quiescent energy. Terminations are 20. The 100LVEL30 family contains this object. It is powered from a supply voltage of 3.3V. A part of the electronic system is mounted in the way of Surface Mount. 20pins are included in its design. This device exhibits a clock edge trigger type of Positive Edge. This part is included in FF/Latches. Normally, the supply voltage (Vsup) should be above 3V. Due to its superior flexibility, it uses 3 circuits.
MC100LVEL30DWG Features
Tube package
100LVEL series
20 pins
MC100LVEL30DWG Applications
There are a lot of ON Semiconductor MC100LVEL30DWG Flip Flops applications.
Event Detectors
EMI reduction circuitry
ESD protection
Count Modes
Circuit Design
Supports Live Insertion
Instrumentation
Balanced Propagation Delays
Data transfer
Data storage
It is packaged in the way of 20-SOIC (0.295, 7.50mm Width). The Tubepackage contains it. In the configuration, Differentialis used as the output. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis in the way of this electric part. A voltage of -3V~-3.8Vis required for its operation. -40°C~85°C TAis the operating temperature. D-Typedescribes this flip flop. JK flip flop is a part of the 100LVELseries of FPGAs. There should be no greater frequency than 1.2GHzon its output. There is a consumption of 62mAof quiescent energy. Terminations are 20. The 100LVEL30 family contains this object. It is powered from a supply voltage of 3.3V. A part of the electronic system is mounted in the way of Surface Mount. 20pins are included in its design. This device exhibits a clock edge trigger type of Positive Edge. This part is included in FF/Latches. Normally, the supply voltage (Vsup) should be above 3V. Due to its superior flexibility, it uses 3 circuits.
MC100LVEL30DWG Features
Tube package
100LVEL series
20 pins
MC100LVEL30DWG Applications
There are a lot of ON Semiconductor MC100LVEL30DWG Flip Flops applications.
Event Detectors
EMI reduction circuitry
ESD protection
Count Modes
Circuit Design
Supports Live Insertion
Instrumentation
Balanced Propagation Delays
Data transfer
Data storage
MC100LVEL30DWG More Descriptions
Flip Flop D-Primary-Secondary Type Pos-Edge 3-Element 20-Pin SOIC W Rail
MC100LVEL30DWG Triple D Type Flip Flop IC, ECL, 3.3 - 3.8 V, 20-Pin SOIC | ON Semiconductor MC100LVEL30DWG
ECL Triple D-Type Flip-Flop with Set and Reset
MC100LVEL30DWG, MOTOR DRIVER IC;
100LVEL SERIES, 1 FUNC, POSITIVE
The MC100LVEL30 is a triple master-slave D flip flop with differential outputs. The MC100EL30 is pin and functionally equivalent to the MC100LVEL30 but is specified for operation at the standard 100E ECL voltage supply. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the clock input. In addition to a common Set input individual Reset inputs are provided for each flip flop. Both the Set and Reset inputs function asynchronous and overriding with respect to the clock inputs.
MC100LVEL30DWG Triple D Type Flip Flop IC, ECL, 3.3 - 3.8 V, 20-Pin SOIC | ON Semiconductor MC100LVEL30DWG
ECL Triple D-Type Flip-Flop with Set and Reset
MC100LVEL30DWG, MOTOR DRIVER IC;
100LVEL SERIES, 1 FUNC, POSITIVE
The MC100LVEL30 is a triple master-slave D flip flop with differential outputs. The MC100EL30 is pin and functionally equivalent to the MC100LVEL30 but is specified for operation at the standard 100E ECL voltage supply. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the clock input. In addition to a common Set input individual Reset inputs are provided for each flip flop. Both the Set and Reset inputs function asynchronous and overriding with respect to the clock inputs.
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