Texas Instruments LMK04828BISQE/NOPB

Description
The LMK04826B and LMK04828B are ultralownoise clock jitter cleaners with dualloop PLLs that support JEDEC JESD204B. They offer exceptional performance with RMS jitter as low as 88 fs (12 kHz to 20 MHz) and a noise floor of 162.5 dBc/Hz at 245.76 MHz.

Features
Ultralow RMS jitter and performance
Up to 14 differential device clocks from PLL2
Up to 7 SYSREF clocks
Maximum clock output frequency of 3.1 GHz
LVPECL, LVDS, HSDS, LCPECL programmable outputs from PLL2
Up to 1 buffered VCXO/Crystal output from PLL1
LVPECL, LVDS, 2xLVCMOS programmable
Dualloop PLLatinum™ PLL architecture
Integrated lownoise crystal oscillator circuit
Holdover mode when input clocks are lost
50% duty cycle output divides, 1 to 32 (even and odd)
Precision digital delay, dynamically adjustable
25 ps step analog delay
Multimode: Dual PLL, single PLL, and clock distribution in 0 delay option
Industrial temperature range: 40 to 85°C
3.15 V to 3.45 V operation
64pin QFN package (9.0 x 9.0 x 0.8 mm)

Applications
Highperformance data converters
Highspeed serial interfaces
Test and measurement equipment
Medical imaging
Aerospace and defense
Telecommunications