Lattice Semiconductor Corporation LC4064V-75TN100C
- Part Number:
- LC4064V-75TN100C
- Manufacturer:
- Lattice Semiconductor Corporation
- Ventron No:
- 3122194-LC4064V-75TN100C
- Description:
- IC CPLD 64MC 7.5NS 100TQFP
- Datasheet:
- LC4064V-75TN100C
Lattice Semiconductor Corporation LC4064V-75TN100C technical specifications, attributes, parameters and parts with similar specifications to Lattice Semiconductor Corporation LC4064V-75TN100C.
- Factory Lead Time8 Weeks
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case100-LQFP
- Number of Pins100
- Weight657.000198mg
- Operating Temperature0°C~90°C TJ
- PackagingTray
- Published2000
- SeriesispMACH® 4000V
- JESD-609 Codee3
- Pbfree Codeyes
- Part StatusActive
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Number of Terminations100
- ECCN CodeEAR99
- Terminal FinishMatte Tin (Sn)
- Additional FeatureYES
- SubcategoryProgrammable Logic Devices
- TechnologyCMOS
- Terminal PositionQUAD
- Terminal FormGULL WING
- Peak Reflow Temperature (Cel)260
- Supply Voltage3.3V
- Terminal Pitch0.5mm
- Frequency178.57MHz
- Reflow Temperature-Max (s)30
- Base Part NumberLC4064
- Pin Count100
- Operating Supply Voltage3.3V
- Programmable TypeIn System Programmable
- Max Supply Voltage3.6V
- Min Supply Voltage3V
- Operating Supply Current12mA
- Number of I/O64
- Memory TypeEEPROM
- Propagation Delay7.5 ns
- Turn On Delay Time7.5 ns
- Number of Logic Elements/Cells36
- Output FunctionMACROCELL
- Number of Macro Cells64
- JTAG BSTYES
- Number of Dedicated Inputs10
- Voltage Supply - Internal3V~3.6V
- Number of Logic Elements/Blocks4
- Height1.4mm
- Length14mm
- Width14mm
- Radiation HardeningNo
- REACH SVHCNo SVHC
- RoHS StatusROHS3 Compliant
- Lead FreeLead Free
LC4064V-75TN100C Overview
There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.In the 100-LQFPpackage, you will find it.There are 64 I/Os programmed in it.There are 100 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.This electrical part has a terminal position of QUADand is connected to the ground.The device is powered by a voltage of 3.3V volts.It is included in Programmable Logic Devices.The chip should be packaged by Tray.Due to its reliability, it is operated at a temperature of [0].Ideally, the chip should be mounted by Surface Mount.In this case, it is a type of FPGA belonging to the ispMACH? 4000V series.A chip with 100pins is programmed.It is also possible to find YESwhen using this device.You can find its related parts in the [0].If high efficiency is to be achieved, the supply voltage should be maintained at [0].It is adopted to store data in [0].In this case, Surface Mountis used to mount the electronic component.There are 100pins on it.It operates at a maximum supply voltage of 3.6V volts.A minimum supply voltage of 3V is required for this device to operate.In total, there are 4 logic elements/blocks.This frequency is 178.57MHz.A total of 10dedicated inputs are available for detecting the status of input signals.In order to form a fundamental building block, there are 36 logic elements or cells.
LC4064V-75TN100C Features
100-LQFP package
64 I/Os
The operating temperature of 0°C~90°C TJ
100 pin count
100 pins
LC4064V-75TN100C Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-75TN100C CPLDs applications.
Cross-Matrix Switch
Programmable power management
Digital designs
White goods (Washing, Cold, Aircon ,...)
D/T registers and latches
Address decoding
Power up sequencing
Address decoders
ROM patching
Synchronous or asynchronous mode
There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.In the 100-LQFPpackage, you will find it.There are 64 I/Os programmed in it.There are 100 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.This electrical part has a terminal position of QUADand is connected to the ground.The device is powered by a voltage of 3.3V volts.It is included in Programmable Logic Devices.The chip should be packaged by Tray.Due to its reliability, it is operated at a temperature of [0].Ideally, the chip should be mounted by Surface Mount.In this case, it is a type of FPGA belonging to the ispMACH? 4000V series.A chip with 100pins is programmed.It is also possible to find YESwhen using this device.You can find its related parts in the [0].If high efficiency is to be achieved, the supply voltage should be maintained at [0].It is adopted to store data in [0].In this case, Surface Mountis used to mount the electronic component.There are 100pins on it.It operates at a maximum supply voltage of 3.6V volts.A minimum supply voltage of 3V is required for this device to operate.In total, there are 4 logic elements/blocks.This frequency is 178.57MHz.A total of 10dedicated inputs are available for detecting the status of input signals.In order to form a fundamental building block, there are 36 logic elements or cells.
LC4064V-75TN100C Features
100-LQFP package
64 I/Os
The operating temperature of 0°C~90°C TJ
100 pin count
100 pins
LC4064V-75TN100C Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-75TN100C CPLDs applications.
Cross-Matrix Switch
Programmable power management
Digital designs
White goods (Washing, Cold, Aircon ,...)
D/T registers and latches
Address decoding
Power up sequencing
Address decoders
ROM patching
Synchronous or asynchronous mode
LC4064V-75TN100C More Descriptions
YES 100-LQFP 2000 LC4064 complex programmable logic device 178.57MHz 12mA 14mm 7.5ns
CPLD ispMACH® 4000V Family 64 Macro Cells 168MHz 3.3V 100-Pin TQFP Tray
ispMACH 4000 Series 64 MacroCell 64 I/O 7.5 ns 3.3 V CPLD - TQFP-100
CPLD, 64MC, 3.3V, ISPMACH, 100TQFP; CPLD Type: -; No. of Macrocells: 64; No. of I/O's: 64I/O's; Logic Case Style: TQFP; No. of Pins: 100Pins; Frequency: 400MHz; Supply Voltage Min: 3V; Supply Voltage Max: 3.6V; Propagation Delay: 7.5ns; Global Clock Setup Time: 4.5ns; Operating Temperature Min: 0°C; Operating Temperature Max: 90°C; Product Range: -; RoHS Phthalates Compliant: Yes; MSL: MSL 3 - 168 hours; SVHC: No SVHC (27-Jun-2018); Operating Temperature Range: 0°C to 90°C; Supply Voltage Range: 3V to 3.6V
CPLD ispMACH® 4000V Family 64 Macro Cells 168MHz 3.3V 100-Pin TQFP Tray
ispMACH 4000 Series 64 MacroCell 64 I/O 7.5 ns 3.3 V CPLD - TQFP-100
CPLD, 64MC, 3.3V, ISPMACH, 100TQFP; CPLD Type: -; No. of Macrocells: 64; No. of I/O's: 64I/O's; Logic Case Style: TQFP; No. of Pins: 100Pins; Frequency: 400MHz; Supply Voltage Min: 3V; Supply Voltage Max: 3.6V; Propagation Delay: 7.5ns; Global Clock Setup Time: 4.5ns; Operating Temperature Min: 0°C; Operating Temperature Max: 90°C; Product Range: -; RoHS Phthalates Compliant: Yes; MSL: MSL 3 - 168 hours; SVHC: No SVHC (27-Jun-2018); Operating Temperature Range: 0°C to 90°C; Supply Voltage Range: 3V to 3.6V
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