IDT, Integrated Device Technology Inc IDT23S08E-2HDCG
- Part Number:
- IDT23S08E-2HDCG
- Manufacturer:
- IDT, Integrated Device Technology Inc
- Ventron No:
- 2980941-IDT23S08E-2HDCG
- Description:
- IC CLK MULT ZD HIGH DRV 16-SOIC
- Datasheet:
- IDT23S08E-2HDCG
Description
The IDT23S08E is a high-speed phase-lock loop (PLL) clock multiplier designed for high-speed clock distribution and multiplication applications. It operates within a frequency range of 10 to 200MHz and achieves zero delay by aligning the phase between the incoming clock and the output clock.
The IDT23S08E has two banks of four outputs each, controlled by two select addresses. Both banks can be put into tri-state mode through proper selection of input addresses. In test mode, the PLL is turned off, and the input clock directly drives the outputs for system testing. In the absence of an input clock, the device enters power down mode, drawing less than 12μA (Commercial Temperature range) or 25μA (Industrial temperature range) and tri-stating the outputs.
The IDT23S08E is available in six unique configurations for both pre-scaling and multiplication of the Input REF Clock. The PLL is closed externally, providing flexibility in controlling the delay between the input clock and the outputs.
Features
3.3V zero delay clock multiplier
Spread spectrum compatible
Distributes one clock input to two banks of four outputs
Separate output enable for each output bank
External feedback (FBK) pin for synchronizing outputs to the clock input
Output Skew <200 ps
Low jitter <200 ps cycle-to-cycle
1x, 2x, 4x output options
No external RC network required
Operates at 3.3V VDD
Available in SOIC and TSSOP packages
Applications
High-speed clock distribution
Clock multiplication
Spread spectrum applications
The IDT23S08E is a high-speed phase-lock loop (PLL) clock multiplier designed for high-speed clock distribution and multiplication applications. It operates within a frequency range of 10 to 200MHz and achieves zero delay by aligning the phase between the incoming clock and the output clock.
The IDT23S08E has two banks of four outputs each, controlled by two select addresses. Both banks can be put into tri-state mode through proper selection of input addresses. In test mode, the PLL is turned off, and the input clock directly drives the outputs for system testing. In the absence of an input clock, the device enters power down mode, drawing less than 12μA (Commercial Temperature range) or 25μA (Industrial temperature range) and tri-stating the outputs.
The IDT23S08E is available in six unique configurations for both pre-scaling and multiplication of the Input REF Clock. The PLL is closed externally, providing flexibility in controlling the delay between the input clock and the outputs.
Features
3.3V zero delay clock multiplier
Spread spectrum compatible
Distributes one clock input to two banks of four outputs
Separate output enable for each output bank
External feedback (FBK) pin for synchronizing outputs to the clock input
Output Skew <200 ps
Low jitter <200 ps cycle-to-cycle
1x, 2x, 4x output options
No external RC network required
Operates at 3.3V VDD
Available in SOIC and TSSOP packages
Applications
High-speed clock distribution
Clock multiplication
Spread spectrum applications
IDT, Integrated Device Technology Inc IDT23S08E-2HDCG technical specifications, attributes, parameters and parts with similar specifications to IDT, Integrated Device Technology Inc IDT23S08E-2HDCG.
- Mounting TypeSurface Mount
- Package / Case16-SOIC (0.154, 3.90mm Width)
- Operating Temperature0°C~70°C
- PackagingTube
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Voltage - Supply3V~3.6V
- Base Part NumberIDT23S08-2
- OutputCMOS, LVTTL
- Number of Circuits1
- Frequency (Max)200MHz
- InputLVTTL
- Ratio - Input:Output1:8
- PLLYes with Bypass
- Differential - Input:OutputNo/No
- Divider/MultiplierYes/Yes
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