Texas Instruments DAC5681Z
- Part Number:
- DAC5681Z
- Manufacturer:
- Texas Instruments
- Ventron No:
- 5188406-DAC5681Z
- Description:
- 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC)
- Datasheet:
- DAC5681Z
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DAC5681Z More Descriptions
16-Bit 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC)
The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x/4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity and noise performance.The DAC5681Z integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC, or half-rate data and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either Low-Pass or High-Pass mode, allowing selection of a higher order output sectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The current-steering architecture of the DAC5681Z consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5681Z is characterized for operation over the industrial temperature range of -40C to 85C and is available in a 64-pin QFN package. The device is pin upgradeable to the dual-channel DAC5682Z as well as the single-channel, non-interpolating DAC5681.
The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x/4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity and noise performance.The DAC5681Z integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC, or half-rate data and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either Low-Pass or High-Pass mode, allowing selection of a higher order output sectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The current-steering architecture of the DAC5681Z consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5681Z is characterized for operation over the industrial temperature range of -40C to 85C and is available in a 64-pin QFN package. The device is pin upgradeable to the dual-channel DAC5682Z as well as the single-channel, non-interpolating DAC5681.
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