CONEXANT CY74FCT2374TSOCT
- Part Number:
- CY74FCT2374TSOCT
- Manufacturer:
- CONEXANT
- Ventron No:
- 5242340-CY74FCT2374TSOCT
- Description:
- 8-BIT REGISTER WITH 3-STATE OUTPUTS
- ECAD Model:
-
- Datasheet:
- CY74FCT2374TSOCT
Images are for reference only.See Product Specifications for product details.If you are interested to buy CY74FCT2374TSOCT.
CY74FCT2374TSOCT More Descriptions
IC FF D-TYPE SNGL 8BIT 20SOIC
REDUCED DRIVE REGISTER
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The CY74FCT2374T is a high-speed, low-power, octal D-type flip-flop featuring separate D-type inputs for each flip-flop. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2374T can replace the CY74FCT374T to reduce noise in an existing design. The device has 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all flip-flops. The flip-flops in the CY74FCT2374T store the state of their individual data (D) inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state of OE does not affect the state of the flip-flops. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
REDUCED DRIVE REGISTER
Contact for details
The CY74FCT2374T is a high-speed, low-power, octal D-type flip-flop featuring separate D-type inputs for each flip-flop. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2374T can replace the CY74FCT374T to reduce noise in an existing design. The device has 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all flip-flops. The flip-flops in the CY74FCT2374T store the state of their individual data (D) inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state of OE does not affect the state of the flip-flops. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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