CONEXANT CY74FCT2374CTQCTE4
- Part Number:
- CY74FCT2374CTQCTE4
- Manufacturer:
- CONEXANT
- Ventron No:
- 5242333-CY74FCT2374CTQCTE4
- Description:
- 8-BIT REGISTER WITH 3-STATE OUTPUTS
- Datasheet:
- CY74FCT2374CTQCTE4
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CY74FCT2374CTQCTE4 More Descriptions
IC FF D-TYPE SNGL 8BIT 20QSOP
Flip-Flop Logic IC; Flip Flop Type:D; Trigger Type:Positive Edge; Output Type:Tri-State Non-Inverted; Supply Voltage Range:4.75V to 5.25V; Logic Case Style:QSOP; No. of Pins:20; Operating Temperature Range:-40°C to 85°C ;RoHS Compliant: Yes
The CY74FCT2374T is a high-speed, low-power, octal D-type flip-flop featuring separate D-type inputs for each flip-flop. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2374T can replace the CY74FCT374T to reduce noise in an existing design. The device has 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all flip-flops. The flip-flops in the CY74FCT2374T store the state of their individual data (D) inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state of OE does not affect the state of the flip-flops. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Flip-Flop Logic IC; Flip Flop Type:D; Trigger Type:Positive Edge; Output Type:Tri-State Non-Inverted; Supply Voltage Range:4.75V to 5.25V; Logic Case Style:QSOP; No. of Pins:20; Operating Temperature Range:-40°C to 85°C ;RoHS Compliant: Yes
The CY74FCT2374T is a high-speed, low-power, octal D-type flip-flop featuring separate D-type inputs for each flip-flop. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2374T can replace the CY74FCT374T to reduce noise in an existing design. The device has 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all flip-flops. The flip-flops in the CY74FCT2374T store the state of their individual data (D) inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state of OE does not affect the state of the flip-flops. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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