Cypress Semiconductor Corp CY2VC521ZXC-2T

Description
The CY2VC521-2 is a PLL-based clock generator with VCXO control and very low output jitter. When connected to a fundamental mode 27 MHz crystal, it generates a 216 MHz output clock. The device has one LVDS output pair tuned to drive two standard LVDS loads and operates from a single 3.3V power supply.
The VIN pin is an analog input that enables the user to pull the output frequency. The pullability range is at least 230 ppm ( 115 ppm). Unlike conventional VCXO designs, the output frequency adjustment is achieved through a proprietary PLL design, allowing the use of a standard 27 MHz crystal.

Features
Output: 216 MHz Output Clock
Input: External 27 MHz Crystal
Differential LVDS Output with 2x Drive to Drive Two Loads
VCXO gives 230 ppm Minimum Pull Range
Low RMS Phase Jitter (12 kHz-20 MHz): 1.3 ps Typical
Low Phase Noise
Fully Integrated Low Noise Phase Locked Loop (PLL)
Excellent Voltage-to-Frequency Linearity
Supply Voltage: 3.3V
Pb-free 16-Pin TSSOP Package

Applications
Networking Equipment
Telecommunications Equipment
Industrial Control Systems
Medical Equipment
Test and Measurement Equipment