Texas Instruments ADS5295PFPT

Description
The ADS5295 is a low-power, 12-bit, 100-MSPS, 8-channel analog-to-digital converter (ADC). It is designed for low power consumption, with 80 mW per channel at 100 MSPS. The ADC has a SNR of 70.6 dBFS and an SFDR of 85 dBc at 10 MHz, 100 MSPS.
The ADS5295 has serial LVDS ADC data outputs, with one- or two-wire serialized LVDS outputs per channel. The one-wire interface supports sample rates up to 80 MSPS, while the two-wire interface supports sample rates up to 100 MSPS.
The ADC has a digital processing block that includes a programmable FIR decimation filter and oversampling to minimize harmonic interference. It also has a programmable IIR high-pass filter to minimize DC offset and a programmable digital gain of 0 dB to 12 dB.
The ADS5295 has a low-frequency noise suppression mode, programmable mapping between ADC input channels and LVDS output pins, and a channel averaging mode. It also has a variety of LVDS test patterns to verify data capture by FPGA or receiver.

Features
12-bit, 100-MSPS, 8-channel ADC
Maximum sample rate: 100 MSPS
Designed for low power: 80 mW per channel at 100 MSPS
SNR: 70.6 dBFS
SFDR: 85 dBc at 10 MHz, 100 MSPS
Serial LVDS ADC data outputs:
One- or two-wire serialized LVDS outputs per channel
One-wire interface: Up to 80 MSPS sample rate
Two-wire interface: Up to 100 MSPS sample rate
Digital processing block:
Programmable FIR decimation filter and oversampling to minimize harmonic interference
Programmable IIR high-pass filter to minimize DC offset
Programmable digital gain: 0 dB to 12 dB
Low-frequency noise suppression mode
Programmable mapping between ADC input channels and LVDS output pins
Channel averaging mode
Variety of LVDS test patterns to verify data capture by FPGA or receiver
Package: 12-mm x 12-mm QFP-80

Applications
Ultrasound imaging
Communication applications
Multichannel data acquisition