Analog Devices Inc. ADCLK950BCPZ-REEL7
- Part Number:
- ADCLK950BCPZ-REEL7
- Manufacturer:
- Analog Devices Inc.
- Ventron No:
- 2973440-ADCLK950BCPZ-REEL7
- Description:
- IC CLK BUF 2:10 4.8GHZ 40LFCSP
- Datasheet:
- ADCLK950BCPZ-REEL7
Description
The ADCLK950 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.
The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 Ω onchip termination resistors. The inputs accept decoupled LVPECL, CML, 3.3 V CMOS (singleended), and accoupled 1.8 V CMOS, LVDS, and LVPECL inputs. A Vias pin is available for biasing accoupled inputs.
The ADCLK950 features 10 fullswing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias Voc to the positive supply and Vas to ground. For ECL operation, bias Vcc to ground and Va to the negative supply. The output stages are designed to directly drive 800 mV each side into 50 Ω terminated to Vcc 2 V for a total differential output swing of 1.6 V.
The ADCLK950 is available in a 40lead LFCSP and specified for operation over the standard industrial temperature range of 40°C to 85°C.
Features
2 selectable differential inputs
4.8 GHz operating frequency
75 fs rms broadband random jitter
Onchip input terminations
3.3V power supply
Applications
Low jitter clock distribution
Clock and data signal restoration
Level translation
Wireless communications
Wired communications
Medical and industrial imaging
ATE and high performance instrumentation
The ADCLK950 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.
The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 Ω onchip termination resistors. The inputs accept decoupled LVPECL, CML, 3.3 V CMOS (singleended), and accoupled 1.8 V CMOS, LVDS, and LVPECL inputs. A Vias pin is available for biasing accoupled inputs.
The ADCLK950 features 10 fullswing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias Voc to the positive supply and Vas to ground. For ECL operation, bias Vcc to ground and Va to the negative supply. The output stages are designed to directly drive 800 mV each side into 50 Ω terminated to Vcc 2 V for a total differential output swing of 1.6 V.
The ADCLK950 is available in a 40lead LFCSP and specified for operation over the standard industrial temperature range of 40°C to 85°C.
Features
2 selectable differential inputs
4.8 GHz operating frequency
75 fs rms broadband random jitter
Onchip input terminations
3.3V power supply
Applications
Low jitter clock distribution
Clock and data signal restoration
Level translation
Wireless communications
Wired communications
Medical and industrial imaging
ATE and high performance instrumentation
Analog Devices Inc. ADCLK950BCPZ-REEL7 technical specifications, attributes, parameters and parts with similar specifications to Analog Devices Inc. ADCLK950BCPZ-REEL7.
- Factory Lead Time8 Weeks
- Lifecycle StatusPRODUCTION (Last Updated: 1 week ago)
- Mounting TypeSurface Mount
- Package / Case40-VFQFN Exposed Pad, CSP
- Surface MountYES
- Number of Pins40
- Operating Temperature-40°C~85°C
- PackagingTape & Reel (TR)
- SeriesSiGe
- JESD-609 Codee3
- Pbfree Codeno
- Part StatusActive
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Number of Terminations40
- ECCN CodeEAR99
- Terminal FinishMatte Tin (Sn)
- SubcategoryClock Drivers
- TechnologyBIPOLAR
- Voltage - Supply2.97V~3.63V
- Terminal PositionQUAD
- Peak Reflow Temperature (Cel)260
- Number of Functions1
- Supply Voltage3.3V
- Terminal Pitch0.5mm
- Reflow Temperature-Max (s)30
- Base Part NumberADCLK950
- OutputLVPECL
- Pin Count40
- Number of Outputs10
- Supply Voltage-Max (Vsup)3.63V
- Power Supplies3.3V
- Number of Circuits1
- Frequency (Max)4.8GHz
- Family950
- Number of Inputs2
- InputCML, CMOS, LVDS, LVPECL
- Ratio - Input:Output2:10
- Differential - Input:OutputYes/Yes
- Same Edge Skew-Max (tskwd)0.045 ns
- Length6mm
- Width6mm
- Radiation HardeningNo
- RoHS StatusROHS3 Compliant
- Lead FreeContains Lead
ADCLK950BCPZ-REEL7 Overview
There is a case of 40-VFQFN Exposed Pad, CSP in which it is packaged. It is packaged as a Tape & Reel (TR). In normal operation, 4.8GHz is the maximum value. A total of 40 terminations are present. Supply voltages of 3.3V are capable of achieving high efficiency. As far as I can tell, it is mounted by Surface Mount. Electrical components classified as Fanout Buffer (Distribution), Multiplexer are classified as such. To ensure reliable performance, the temperature should be set to -40°C~85°C. The clock switch should operate with a voltage of 2.97V~3.63VV. It has a pin count of 40. There is LVPECL output from clock driver. During operation, 40 pins are used. This object belongs to the ADCLK950 family. It is contained in Clock Drivers. A member of the 950 family, this clock buffer is a digital camera. In this case, Vsup will be set to 3.63V (decimal). By default, the output of the circuit clock is set to 10. A supply of 3.3V volts is needed to power it. In this case, the electronic part belongs to the SiGe series. If the input is 2, it is configured.
ADCLK950BCPZ-REEL7 Features
40 terminations
The operating temperature of -40°C~85°C degrees
Clock Drivers subcategory
ADCLK950BCPZ-REEL7 Applications
There are a lot of Analog Devices Inc. ADCLK950BCPZ-REEL7 Clock Buffers & Drivers applications.
Data communication
Gigabit Ethernet (GbE)
Synchronous optical network (SONET)
High-end consumer electronics
Host bus adapter card
Data center
High speed instrument
High performance communication system
Threshold detection
Car
There is a case of 40-VFQFN Exposed Pad, CSP in which it is packaged. It is packaged as a Tape & Reel (TR). In normal operation, 4.8GHz is the maximum value. A total of 40 terminations are present. Supply voltages of 3.3V are capable of achieving high efficiency. As far as I can tell, it is mounted by Surface Mount. Electrical components classified as Fanout Buffer (Distribution), Multiplexer are classified as such. To ensure reliable performance, the temperature should be set to -40°C~85°C. The clock switch should operate with a voltage of 2.97V~3.63VV. It has a pin count of 40. There is LVPECL output from clock driver. During operation, 40 pins are used. This object belongs to the ADCLK950 family. It is contained in Clock Drivers. A member of the 950 family, this clock buffer is a digital camera. In this case, Vsup will be set to 3.63V (decimal). By default, the output of the circuit clock is set to 10. A supply of 3.3V volts is needed to power it. In this case, the electronic part belongs to the SiGe series. If the input is 2, it is configured.
ADCLK950BCPZ-REEL7 Features
40 terminations
The operating temperature of -40°C~85°C degrees
Clock Drivers subcategory
ADCLK950BCPZ-REEL7 Applications
There are a lot of Analog Devices Inc. ADCLK950BCPZ-REEL7 Clock Buffers & Drivers applications.
Data communication
Gigabit Ethernet (GbE)
Synchronous optical network (SONET)
High-end consumer electronics
Host bus adapter card
Data center
High speed instrument
High performance communication system
Threshold detection
Car
ADCLK950BCPZ-REEL7 More Descriptions
Low Skew Clock Driver, 950 Series, 10 True Output(s), 0 Inverted Output(s), Bipolar
Two Selectable Inputs, 10 LVPECL Outputs, SiGe Clock Fanout Buffer
Clock Fanout Buffer 10-OUT 2-IN 1:10 40-Pin LFCSP EP T/R
Two Selectable Inputs, 10 LVPECL Outputs, SiGe Clock Fanout Buffer
Clock Fanout Buffer 10-OUT 2-IN 1:10 40-Pin LFCSP EP T/R
The three parts on the right have similar specifications to ADCLK950BCPZ-REEL7.
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ImagePart NumberManufacturerFactory Lead TimeLifecycle StatusMounting TypePackage / CaseSurface MountNumber of PinsOperating TemperaturePackagingSeriesJESD-609 CodePbfree CodePart StatusMoisture Sensitivity Level (MSL)Number of TerminationsECCN CodeTerminal FinishSubcategoryTechnologyVoltage - SupplyTerminal PositionPeak Reflow Temperature (Cel)Number of FunctionsSupply VoltageTerminal PitchReflow Temperature-Max (s)Base Part NumberOutputPin CountNumber of OutputsSupply Voltage-Max (Vsup)Power SuppliesNumber of CircuitsFrequency (Max)FamilyNumber of InputsInputRatio - Input:OutputDifferential - Input:OutputSame Edge Skew-Max (tskwd)LengthWidthRadiation HardeningRoHS StatusLead FreeMountPropagation DelayTurn On Delay TimeSupply Voltage Limit-MaxHeight Seated (Max)fmax-MinView Compare
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ADCLK950BCPZ-REEL78 WeeksPRODUCTION (Last Updated: 1 week ago)Surface Mount40-VFQFN Exposed Pad, CSPYES40-40°C~85°CTape & Reel (TR)SiGee3noActive3 (168 Hours)40EAR99Matte Tin (Sn)Clock DriversBIPOLAR2.97V~3.63VQUAD26013.3V0.5mm30ADCLK950LVPECL40103.63V3.3V14.8GHz9502CML, CMOS, LVDS, LVPECL2:10Yes/Yes0.045 ns6mm6mmNoROHS3 CompliantContains Lead-------
-
8 WeeksPRODUCTION (Last Updated: 3 weeks ago)Surface Mount16-VFQFN Exposed Pad, CSP-16-40°C~125°CTape & Reel (TR)SiGee3noActive3 (168 Hours)16EAR99Matte Tin (Sn)Buffer Amplifier-2.375V~3.63VQUAD26023.3V0.5mm40ADCLK907ECL, NECL, PECL162---7.5GHz--Clock1:1Yes/Yes-3mm3mmNoROHS3 CompliantContains LeadSurface Mount95 ps125 ps6V0.9mm-
-
8 WeeksPRODUCTION (Last Updated: 2 weeks ago)Surface Mount16-VFQFN Exposed Pad, CSP-16-40°C~125°CTape & Reel (TR)SiGee3noActive3 (168 Hours)16EAR99Matte Tin (Sn)Buffer Amplifier-2.375V~3.63VQUAD26013.3V0.5mm40ADCLK905ECL, NECL, PECL161---7.5GHz--Clock1:1Yes/Yes-3mm3mmNoROHS3 CompliantContains LeadSurface Mount95 ps125 ps6V0.9mm-
-
8 WeeksPRODUCTION (Last Updated: 2 weeks ago)Surface Mount32-VFQFN Exposed Pad, CSPYES32-40°C~85°CTape & Reel (TR)SiGee3noActive3 (168 Hours)32EAR99Matte Tin (Sn)-BIPOLAR2.97V~3.63VQUAD26013.3V0.5mm40ADCLK948LVPECL3283.63V-14.8GHz9482CML, CMOS, LVDS, LVPECL2:8Yes/Yes-5mm5mmNoROHS3 CompliantContains Lead-----4500 MHz
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