Analog Devices Inc. ADAU1381BCPZ-RL
- Part Number:
- ADAU1381BCPZ-RL
- Manufacturer:
- Analog Devices Inc.
- Ventron No:
- 3171815-ADAU1381BCPZ-RL
- Description:
- IC AUDIO CODEC STEREO LN 32LFCSP
- Datasheet:
- ADAU1381BCPZ-RL
Analog Devices Inc. ADAU1381BCPZ-RL technical specifications, attributes, parameters and parts with similar specifications to Analog Devices Inc. ADAU1381BCPZ-RL.
- Mounting TypeSurface Mount
- Package / Case32-VFQFN Exposed Pad, CSP
- Surface MountYES
- Operating Temperature-25°C~85°C
- PackagingTape & Reel (TR)
- JESD-609 Codee3
- Pbfree Codeyes
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Number of Terminations32
- Terminal FinishMATTE TIN
- Terminal PositionQUAD
- Peak Reflow Temperature (Cel)225
- Number of Functions1
- Terminal Pitch0.5mm
- Pin Count32
- JESD-30 CodeS-XQCC-N32
- Qualification StatusCOMMERCIAL
- Supply Voltage-Max (Vsup)3.65V
- Supply Voltage-Min (Vsup)1.8V
- Data InterfaceSPI
- Voltage - Supply, Analog1.8V~3.65V
- Voltage - Supply, Digital1.63V~3.65V
- Resolution (Bits)24 b
- Sigma DeltaNo
- Number of ADCs / DACs2 / 2
- Dynamic Range, ADCs / DACs (db) Typ96.5 / 100
- S/N Ratio, ADCs / DACs (db) Typ97 / 100
- Height Seated (Max)1mm
- Length5mm
- Width5mm
- RoHS StatusROHS3 Compliant
ADAU1381BCPZ-RL Overview
The JESD-609 Code for this particular component is e3, indicating that it meets the requirements for automotive applications. The Terminal Position is QUAD, meaning that the component has four terminals arranged in a square pattern. The Peak Reflow Temperature (Cel) is 225, indicating the maximum temperature at which the component can be soldered. The Terminal Pitch is 0.5mm, meaning that the distance between each terminal is 0.5mm. The Pin Count is 32, indicating that there are 32 pins on the component. The JESD-30 Code is S-XQCC-N32, which provides additional specifications for the component. The Qualification Status is COMMERCIAL, indicating that the component is suitable for commercial use. The Voltage - Supply, Analog is 1.8V~3.65V, indicating the range of voltage that can be supplied to the component for analog operations. The S/N Ratio, ADCs / DACs (db) Typ is 97 / 100, indicating the signal-to-noise ratio for the analog-to-digital converters and digital-to-analog converters in the component. The Length of the component is 5mm.
ADAU1381BCPZ-RL Features
Embedded in the 32-VFQFN Exposed Pad, CSP package
Operating temperature of -25°C~85°C
2 / 2 ADCs / DACs
ADAU1381BCPZ-RL Applications
There are a lot of Rochester Electronics, LLC ADAU1381BCPZ-RL CODECs Interface ICs applications.
Spooling or level wind
X-Y positioning
Multiplication
Conveying
Stagecraft
Web tensioning
Registration mark timing
Wire number reduction in application that have multiple inputs
Feature extraction
Radiation therapy
The JESD-609 Code for this particular component is e3, indicating that it meets the requirements for automotive applications. The Terminal Position is QUAD, meaning that the component has four terminals arranged in a square pattern. The Peak Reflow Temperature (Cel) is 225, indicating the maximum temperature at which the component can be soldered. The Terminal Pitch is 0.5mm, meaning that the distance between each terminal is 0.5mm. The Pin Count is 32, indicating that there are 32 pins on the component. The JESD-30 Code is S-XQCC-N32, which provides additional specifications for the component. The Qualification Status is COMMERCIAL, indicating that the component is suitable for commercial use. The Voltage - Supply, Analog is 1.8V~3.65V, indicating the range of voltage that can be supplied to the component for analog operations. The S/N Ratio, ADCs / DACs (db) Typ is 97 / 100, indicating the signal-to-noise ratio for the analog-to-digital converters and digital-to-analog converters in the component. The Length of the component is 5mm.
ADAU1381BCPZ-RL Features
Embedded in the 32-VFQFN Exposed Pad, CSP package
Operating temperature of -25°C~85°C
2 / 2 ADCs / DACs
ADAU1381BCPZ-RL Applications
There are a lot of Rochester Electronics, LLC ADAU1381BCPZ-RL CODECs Interface ICs applications.
Spooling or level wind
X-Y positioning
Multiplication
Conveying
Stagecraft
Web tensioning
Registration mark timing
Wire number reduction in application that have multiple inputs
Feature extraction
Radiation therapy
ADAU1381BCPZ-RL More Descriptions
Audio Codec 2ADC / 2DAC 24-Bit 32-Pin LFCSP EP T/R
IC AUDIO CODEC STEREO LN 32LFCSP
The ADAU1381 is a low-power, 24-bit stereo audio codec. The stereo audio DAC supports sample rates from 8 kHz to 96 kHz, a digital volume control, and a programmable digital filter. The stereo audio ADC supports sample rates 8 kHz to 96 kHz and a programmable digital volume control. The ADAU1381 is ideal for battery-powered audio applications. The record path includes two digital stereo microphone inputs and an analog stereo input path. The analog inputs can be configured for either a pseudo-differential or a single-ended stereo source. Additionally, there is a dedicated analog beep input signal path that can be mixed into any output. The ADAU1381 includes a stereo line output and speaker driver, which makes the device capable of supporting dynamic speakers. The serial control bus supports the I2C or SPI protocols, and the serial audio bus is programmable for I2S, left-justified, right-justified, or TDM mode. A programmable PLL supports flexible clock generation for all standard rates and available master clocks from 8 MHz to 27 MHz. Applications Digital still cameras Digital video cameras
IC AUDIO CODEC STEREO LN 32LFCSP
The ADAU1381 is a low-power, 24-bit stereo audio codec. The stereo audio DAC supports sample rates from 8 kHz to 96 kHz, a digital volume control, and a programmable digital filter. The stereo audio ADC supports sample rates 8 kHz to 96 kHz and a programmable digital volume control. The ADAU1381 is ideal for battery-powered audio applications. The record path includes two digital stereo microphone inputs and an analog stereo input path. The analog inputs can be configured for either a pseudo-differential or a single-ended stereo source. Additionally, there is a dedicated analog beep input signal path that can be mixed into any output. The ADAU1381 includes a stereo line output and speaker driver, which makes the device capable of supporting dynamic speakers. The serial control bus supports the I2C or SPI protocols, and the serial audio bus is programmable for I2S, left-justified, right-justified, or TDM mode. A programmable PLL supports flexible clock generation for all standard rates and available master clocks from 8 MHz to 27 MHz. Applications Digital still cameras Digital video cameras
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