Analog Devices Inc. AD9683BCPZRL7-170

Description
The AD9683 is a 14-bit analog-to-digital converter (ADC) with sampling speeds of up to 250 MSPS. It features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC core supports wide bandwidth inputs and a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) compensates for variations in the ADC clock duty cycle, ensuring excellent performance. The JESD204B high-speed serial interface reduces board routing requirements and lowers pin count requirements for the receiving device.

Features
JESD204B Subclass 0 or Subclass 1 coded serial digital outputs
Signal-to-noise ratio (SNR) = 70.6 dBFS at 185 MHz AN and 250 MSPS
Spurious-free dynamic range (SFDR) = 88 dBc at 185 MHz AIN and 250 MSPS
Total power consumption: 434 mW at 250 MSPS
1.8 V supply voltages
Integer 1-to-8 input clock divider
Sample rates of up to 250 MSPS
IF sampling frequencies of up to 400 MHz
Flexible analog input range: 1.4 Vp-p to 20 V p-p (1.75 Vp-p nominal)
ADC clock duty cycle stabilizer (DCS)
Serial port control
Energy-saving power-down modes

Applications
Communications
Diversity radio systems
Multimode digital receivers (3G)
TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM, EDGE, LTE
DOCSIS 3.0 CMTS upstream receive paths
HFC digital reverse path receivers
Smart antenna systems
Electronic test and measurement equipment
Radar receivers
COMSEC radio architectures
IED detection/jamming systems
General-purpose software radios
Broadband data applications
Ultrasound equipment