Analog Devices Inc. AD9508BCPZ

Description
The AD9508 is a clock fanout buffer with output dividers and delay adjust. It provides low jitter and low phase noise clock distribution for applications such as docking data converters, clocking highspeed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs, highperformance wireless transceivers, highperformance instrumentation, and broadband infrastructure.

Features
1.65 GHz differential clock inputs/outputs
10bit programmable dividers, 1 to 1024, all integers
Up to 4 differential outputs or 8 CMOS outputs
Pin strapping capability for hardwired programming at powerup
<115 fs rms broadband random jitter
Additive output jitter: 41 fs rms typical (12 kHz to 20 MHz)
Excellent outputtooutput isolation
Automatic synchronization of all outputs
Single 2.5 V/3.3 V power supply
Internal LDO (low dropout) voltage regulator for enhanced power supply immunity
Phase offset select for outputtooutput coarse delay adjust
3 programmable output logic levels, LVDS, HSTL, and CMOS
Serial control port (SPI/I°C) or pinprogrammable mode
Spacesaving 24lead LFCSP

Applications
Low jitter, low phase noise clock distribution
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
High performance wireless transceivers
High performance instrumentation
Broadband infrastructure