IDT, Integrated Device Technology Inc 8SLVP2102ANLGI

Description
The 8SLVP2102 is a highperformance differential LVPECL fanout buffer designed for fanning out highfrequency, low additive phasenoise clock and data signals. It operates from a 3.3V or 2.5V power supply and features guaranteed outputtooutput and parttopart skew characteristics, making it ideal for clock distribution applications requiring welldefined performance and repeatability.

Features
Two low skew, low additive jitter LVPECL output pairs
Two selectable, differential clock input pairs (LVDS, LVPECL, CML)
Maximum input clock frequency: 2GHz
Output skew: 5ps (typical)
Propagation delay: 225ps (maximum)
Low additive phase jitter: 36fs RMS (maximum)
Full 3.3V and 2.5V supply voltage
Maximum device current consumption: 56mA (maximum)
Available in leadfree (RoHS 6), 16Lead VFQFPN package
Supports case temperatures up to 105°C
Accepts singleended LVCMOS levels

Applications
Wiring differential input levels to accept singleended levels (Figure 1A and Figure 1B)
Differential PCLKA, nPCLKA, PCLKB, and nPCLKB pairs can also accept singleended LVCMOS levels