Nexperia USA Inc. 74HCT175PW,112
Part Number:
- 74HCT175PW,112
Manufacturer:
- Nexperia USA Inc.
Ventron No:
- 3209364-74HCT175PW,112
Description:
- IC D-TYPE POS TRG SNGL 16TSSOP
Datasheet:
- 74HCT175PW,112
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Part Overview
Description
The 74HC175 and 74HCT175 are quad positive-edge triggered D-type flip-flops with individual data inputs (Dn) and complementary outputs (Qn and Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes, enabling the use of current limiting resistors to interface inputs to voltages in excess of Voc.
Features
Input levels:
For 74HC175: CMOS level
For 74HCT175: TTL level
Four edge-triggered D-type flip-flops
Asynchronous master reset
Complies with JEDEC standard no. 7A
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to 85 °C and -40 °C to 125 °C
Applications
Data storage
Register files
Counters
Shift registers
Sequence generators
The 74HC175 and 74HCT175 are quad positive-edge triggered D-type flip-flops with individual data inputs (Dn) and complementary outputs (Qn and Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes, enabling the use of current limiting resistors to interface inputs to voltages in excess of Voc.
Features
Input levels:
For 74HC175: CMOS level
For 74HCT175: TTL level
Four edge-triggered D-type flip-flops
Asynchronous master reset
Complies with JEDEC standard no. 7A
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to 85 °C and -40 °C to 125 °C
Applications
Data storage
Register files
Counters
Shift registers
Sequence generators
Specifications
Nexperia USA Inc. 74HCT175PW,112 technical specifications, attributes, parameters and parts with similar specifications to Nexperia USA Inc. 74HCT175PW,112.
- Factory Lead Time4 Weeks
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case16-TSSOP (0.173, 4.40mm Width)
- Number of Pins16
- Operating Temperature-40°C~125°C TA
- PackagingTube
- Published2011
- Series74HCT
- JESD-609 Codee4
- Part StatusActive
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Number of Terminations16
- Terminal FinishNickel/Palladium/Gold (Ni/Pd/Au)
- TechnologyCMOS
- Voltage - Supply4.5V~5.5V
- Terminal PositionDUAL
- Terminal FormGULL WING
- Peak Reflow Temperature (Cel)260
- Supply Voltage5V
- Terminal Pitch0.65mm
- Reflow Temperature-Max (s)30
- Base Part Number74HCT175
- FunctionMaster Reset
- Output TypeDifferential
- Operating Supply Voltage5V
- Number of Elements1
- PolarityNon-Inverting
- Number of Bits4
- Clock Frequency49MHz
- Propagation Delay16 ns
- Turn On Delay Time19 ns
- FamilyHCT
- Logic FunctionD-Type, Flip-Flop
- Current - Quiescent (Iq)8μA
- Current - Output High, Low4mA 4mA
- Max Propagation Delay @ V, Max CL33ns @ 4.5V, 50pF
- Trigger TypePositive Edge
- Input Capacitance3.5pF
- Number of Input Lines4
- Clock Edge Trigger TypePositive Edge
- Length5mm
- Radiation HardeningNo
- RoHS StatusROHS3 Compliant
Certification
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